a. Field of the Invention
The present invention generally relates to a virtual computer system, and more particularly to a virtual computer system in which a plurality of guest programs (virtual machines) run in a time shared manner in a central processing unit under the control of a virtual machine monitor. The present invention is specifically concerned with an improvement in input/output interrupt control.
b. Description of the Related Art
Conventionally, there are known various computer systems directed to improving the rate of operation. For example, there is known a virtual computer system in which a plurality of guest programs share time and run in a central processing unit under the control of a virtual machine monitor (host). Currently, such a virtual computer system is required to handle a variety of users' programs. Particularly, a guest program which needs real-time processing, such as a process control, may be required by users.
In such a case, an input/output interrupt event generated by process control mechanism must be handled with high priority. When such an input/output interrupt event is generated while a guest program for processing the process control mechanism does not run in the physical central processing unit, it is necessary to keep the input/output interrupt event waiting until the requested guest program runs in the central processing unit. Thus, there is a need for a procedure for effectively controlling priority of input/output interrupt events among the guest programs.
In a virtual computer system, it is very difficult to control input/output processing which is asynchronous to the operation of the central processing unit. Referring to FIG. 1A, there is illustrated a conventional input/output interrupt control. A plurality of virtual machines (guests) #A, #B, . . . , #D run in a central processing unit 1b with time shared. All input/output instructions and interrupts directed to the virtual machines are input to a virtual machine monitor (VMM, also called host) 1a without exception. The virtual machine monitor subjects the input instructions and interrupts to a scheduling process, and then determines which one of the virtual machines should be accessed for each instruction/interrupt. Then the virtual machine monitor 1a executes interrupt processing by emulation (software interrupt). Thus, the overhead of the system shown in FIG. 1A is large.
Another conventional virtual computer system directed to overcoming the above-mentioned shortcoming has been proposed. The proposed system handles input/output interrupts addressed to the virtual machines without intervention of the virtual machine monitor. In the proposed virtual computer system, the virtual machines are assigned different priorities. Thus, in a state where one of the virtual machines is running in the CPU, when an input/output interrupt directed to another one of the virtual machines having higher priority occurs, the right to exclusively use the CPU should be assigned to the virtual machine having higher priority instead of the virtual machine currently running. In the system shown in FIG. 1A, it is easy to assign the right to use the CPU to the higher-priority virtual machine because all input/output processings are reported to the virtual machine monitor 1a and it is sufficient for the lower-priority virtual machine to return the right to use the CPU to the virtual machine monitor 1a.
FIG. 1B illustrates a virtual computer system which handles input/output interrupts addressed to the virtual machines without intervention of the virtual machine monitor. In the configuration shown in FIG. 1B, it is impossible to discriminate only input/output interrupts directed to virtual machines having priority over the virtual machine which is running from other input/output interrupts and to inform the virtual machine monitor of only the input/output interrupts addressed to the higher-priority virtual machines. This is further described with reference to FIG. 1B.
It is now assumed that an input/output event #1 addressed to virtual machine #D occurs in an input/output unit 5. A channel processor (CHP) 4 discriminates the input/output event #1 and accesses a corresponding sub-channel (SCH) area 22 provided in a main storage device (MS) 2. A domain identification (DMID) data 22a indicating the virtual machine #D is read out from a specific area of the sub-channel area 22 related to the virtual machine #D, and is then transferred to an interrupt pending register 30b of an interrupt hardware (IHW) 30 formed in a memory control unit (MCU) 3. The transferred domain identification data 22a is written into an area corresponding to the domain identification data 22a (virtual machine #D). As will be described later, a virtual machine monitor (VMM) 20 runs in the CPU 10 in a time shared manner with the virtual machines. Thus, the virtual machine monitor 20 is also identified by a corresponding domain information data. Hereafter, the domain identification data is referred to as a domain identifier.
On the other hand, when the virtual machine monitor (VMM) 20 dispatches the virtual machine #D by a predetermined instruction, it accesses a control block 23 corresponding to the domain identifier (DMID) indicative of the virtual machine #D. Then mask information 23b stored in a specific area of the control bock 23 is read out therefrom and transferred to an interrupt mask register 30a formed in the interrupt hardware 30. Then the transferred mask information 23b is written into a corresponding area of the interrupt mask register 30a. At this time, `0` is written into the areas of the interrupt mask register 30a which correspond to virtual machines that are not dispatched. When the domain identifier indicating the virtual machine #D is written into the interrupt mask register 30a, the interrupt hardware 30 compares the mask information relating to the virtual machine #D with the corresponding pending information of the interrupt pending register 30b. When the information coincides, the virtual machine #D is immediately made active.
It can be seen from the above description that it is impossible to initiate a non-running virtual machine until an input/output instruction addressed to this virtual machine is dispatched from the virtual machine monitor 20, even when the requested virtual machine which is not running has priority over a virtual machine which is currently running.